Verilog Code Framework - v-skeleton

This repository provides a minimal framework for developing, simulating, and debugging Verilog-based digital designs. It supports both standard simulation and NVBoard-based graphical simulation for visual interaction.

📁 Directory Structure

v-skeleton/
├── constr/             # Timing constraint files
│   └── top.nxdc        # Top-level constraint file (e.g., for FPGA tools)
├── include/            # Common C/C++ headers
│   ├── debug.h         # Debugging macros
│   └── macro.h         # Utility macros
├── Makefile            # Build system configuration
├── README.md           # This file
├── src/                # C++ simulation entry points
│   ├── main_sim.cpp    # CLI-based simulation without GUI
│   └── nvboard/
│       └── main_nv.cpp # NVBoard-based simulation with GUI
└── vsrc/               # Verilog source files
    └── top.v           # Top-level Verilog module

⚙️ Building & Running

1. Prerequisites

Ensure the following tools are installed:

• Verilator – for Verilog-to-C++ simulation.
• g++ – for compiling the C++ simulation driver.
• (Optional) NVBoard – for GUI simulation support.

2. Build Simulation

To build the command-line simulation version:

make sim

To build the NVBoard-based GUI version:

make nv

3. Run Simulation

After a successful build, run the executable:

./build/sim    # Run command-line simulation
./build/nv     # Run with NVBoard GUI

🧪 Testing & Debugging

• Use macros in debug.h for printing debug information.
• Clean build artifacts with:

make clean

📄 License

Please choose and specify a license (e.g., MIT, BSD, GPL) appropriate for your use case.