fix(wast): SIMD/memory64 validation, element/data segment fixes, GC types#134
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fix(wast): SIMD/memory64 validation, element/data segment fixes, GC types#134
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…ypes - Add SIMD instruction type validation (v128 load/store/ops) - Add memory64 address type validation for load/store/grow/size - Fix spectest memory and table import resolution - Add cross-module table import support - Fix externref element segment initialization - Improve GC type subtyping and reference type validation - Fix unreachable code polymorphic stack handling - Add memory64 field to MemoryType across decoder/runtime/component WAST: +432 assertions passing over previous commit
🔍 Build Diagnostics ReportSummary
🎯 Impact AnalysisIssues in Files You Modified
Cascading Issues (Your Changes Breaking Other Files)
✅ No Issues DetectedPerfect! Your changes don't introduce any new errors or warnings, and don't break any existing code. 📊 Full diagnostic data available in workflow artifacts 🔧 To reproduce locally: # Install cargo-wrt
cargo install --path cargo-wrt
# Analyze your changes
cargo-wrt build --output json --filter-severity error
cargo-wrt check --output json --filter-severity warning |
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- Add 0xFD SIMD prefix parsing (v128.const, shuffle, lane ops, memops) - Add 0xFE atomics prefix parsing (load/store/rmw/cmpxchg/fence) - Add GC typed ref opcodes (call_ref, return_call_ref, ref.as_non_null, br_on_null, br_on_non_null) - Change MemArg.offset from u32 to u64 for memory64 support - Add table limits min<=max validation - Add nullexternref and bottom type parsing in value type decoder Modules with SIMD/atomic instructions now load successfully. WAST: +346 assertions over previous commit, +5,889 total session gain
- Fix data segment initialization for memory64 (i64 offsets) - Fix memory.grow/memory.size to return i64 for memory64 memories - Fix all 23 load/store instructions to use i64 addresses for memory64 - Add import type validation (function signatures, memory/table limits, global types) enabling assert_unlinkable tests - Fix ref.null to return FuncRef(None)/ExternRef(None) not I32(-1) - Fix table index as unsigned u32, correct error messages - Fix module registration for unnamed modules in WAST runner - Add br_on_non_null instruction execution - Propagate memory64 flag through CoreMemoryType conversions WAST: 75 files passing (+10), 37,143 assertions (+930 over previous)
…sing - Implement all 200+ SIMD V128 instructions (integer, float, bitwise, comparison, conversion, lane ops, memory ops, shuffle) - Add alignment validation for memory and SIMD load/store instructions - Add index range validation for function/table/memory/global references - Add export index validation and element/data segment index checks - Fix GC reference type parsing in table, local, global, element decoders - Support all GC heap types (anyref, eqref, i31ref, structref, arrayref, nullfuncref, nullexternref, encoded ref types) WAST: 117 files passing (+52), 59,855 assertions (+22,712) Pass rate: 91.2% (was 56.6%)
…tack, SIMD extend - Canonicalize NaN in all scalar and SIMD float arithmetic operations - Remove multi-memory decoder restriction (now part of core spec) - Add multi-memory memarg parsing with bit 6 flag - Add table64 field throughout type system (TableType, clean types, decoder) - Fix all bulk memory/table ops for 64-bit indices in validator - Fix unreachable code stack truncation (truncate to frame height) - Fix SIMD extend opcode dispatch (high/low were swapped) - Add v128.const to constant expression validator - Fix V128 NaN-aware lane comparison in wast_values
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Summary
Test plan